Henry LeCompte

University of Michigan

BSE Computer Engineering, Mathematics Minor • 2025 — 2028

Clubs: Michigan Robotic Submarine, Michigan Climbing Club

Classes: Digital Logic Design, Programming and Intro Data Structures, Discrete Math

American Heritage Schools

High School Diploma, Concentration in Computer Science • 2025

Clubs: FIRST Robotics Team 2383, Science Olympiad

Starwood Property Trust

Software Engineering Intern • May — August 2025, 2026

• Developed Graph based Retrieval Augmented Generation (GraphRAG) framework designed to enable fast search in highly complex legal documents
• Collaborated with business teams and legal department to understand project requirement
• Gave multiple presentations to key project stakeholders to ensure company wide understanding and seamless transition to production deployment

Security Department Services

Software Engineering Intern • June — July 2024

• Developed full-stack Retrieval Augmented Generation (RAG) LLM app focussed on ensuring data security and privacy
• Implemented PostgreSQL database with LlamaIndex framework
• Collaborated with project lead on solving roadblocks and daily progress checks

Big Brothers Big Sisters Miami

Volunteer Robotics Instructor • May — August 2022

• Created and taught a custom curriculum to teach engineering and programming of Lego robots
• Set up labs and led hands-on activities to build lego robots
• Worked with underprivileged students to inspire them to enter careers in engineering and technology

Pipelined RISCV Core

Verilog, Wishbone, UART • December 2025 — Present

• Implemented 64 bit RISCV core with integer multiply in Verilog
• von Neumann Architecture to allow loading programs at runtime
• Compiled GCC for the core and tested multiple programs
• Memory access and UART interface implemented with fully compliant Wishbone bus

FPGA Matrix Multiplier

Verilog, C++, Arduino, Quartus • August — December 2025

• Developed RTL logic in Verilog to multiply 3x3 matrices streamed over AXI4-Stream compliant bus.
• Implemented on Altera MAX10M08 Development board using Quartus
• Fully verified design with Verilog testbenches and validated on device with Altera SignalTap
• Wrote Arduino Code in C++ to interact with FPGA with tight timing constraints

github.com/HenryLeC/matrix_multiply